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FS6322-08 Datasheet

  • FS6322-08

  • THREE PLL CLOCK GENERATOR IC

  • 64.81KB

  • 7頁

  • ETC

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FS6322-08
AMERICAN MICROSYSTEMS, INC.
Three-PLL Clock Generator IC
Advance Information
February 2001
1.0
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Features
2.0
Description
Three PLLs with deep reference, feedback, and post
dividers to provide precision clock frequencies
Multiple outputs provide several clocking options
Outputs may be tristated for board testing
S0, S1, and S2 inputs modify output frequencies for
design flexibility
3.3V operation
Custom frequency patterns, pinouts, and packages
are available. Contact your local AMI Sales Repre-
sentative for more information.
The FS6322 is a ROM-based CMOS clock generator IC
designed to minimize cost and component count in a va-
riety of electronic systems.
Three low-jitter phase-locked loops (PLLs) drive up to five
low-skew clock outputs to provide a high degree of flexi-
bility. The device is packaged in a 16-pin SOIC to mini-
mize board space.
High-resolution divider capability permits generation of
desired frequencies.
Figure 1: Pin Configuration
CLK_C
VDD
VSS
XOUT/REFIN
XIN
CLK_E
CLK_D
CLK_F
1
2
3
16
15
14
OE
S2
VDD
S1
S0
VSS
CLK_A
CLK_B
FS6322
4
5
6
7
8
13
12
11
10
9
16-pin (0.150鈥? SOIC
Figure 2: Block Diagram
OE
XIN
XOUT
Crystal
Oscillator
PLL A
Clock
Logic
CLK_A
CLK_B
CLK_C
CLK_D
CLK_E
CLK_F
PLL B
PLL C
S2:S0
Device
Control
FS6322-08
This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice.
ISO9001
2.2.01

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