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FQI7N10L Datasheet

  • FQI7N10L

  • 100V LOGIC N-Channel MOSFET

  • 558.77KB

  • 9頁

  • FAIRCHILD

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FQB7N10L / FQI7N10L
December 2000
QFET
FQB7N10L / FQI7N10L
100V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild鈥檚 proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state
resistance,
provide
superior
switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as high
efficiency switching DC/DC converters, and DC motor
control.
D
TM
Features
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7.3A, 100V, R
DS(on)
= 0.35鈩?@V
GS
= 10 V
Low gate charge ( typical 4.6 nC)
Low Crss ( typical 12 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
175擄C maximum junction temperature rating
Low level gate drive requirments allowing
direct operationfrom logic drives
D
!
"
G
S
G
!
! "
"
"
D
2
-PAK
FQB Series
G D S
I
2
-PAK
FQI Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25擄C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25擄C)
Drain Current
- Continuous (T
C
= 100擄C)
Drain Current
- Pulsed
(Note 1)
FQB7N10L / FQI7N10L
100
7.3
5.15
29.2
鹵
20
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/擄C
擄C
擄C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25擄C) *
Power Dissipation (T
C
= 25擄C)
50
7.3
4.0
6.0
3.75
40
0.27
-55 to +175
300
T
J
, T
STG
T
L
- Derate above 25擄C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
胃JC
R
胃JA
R
胃JA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
3.75
40
62.5
Units
擄C/W
擄C/W
擄C/W
* When mounted on the minimum pad size recommended (PCB Mount)
漏2000 Fairchild Semiconductor International
Rev. A2, December 2000

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