FQH35N40 400V N-Channel MOSFET
July 2005
QFET
FQH35N40
400V N-Channel MOSFET
Features
鈥?35A, 400V, R
DS(on)
= 0.105鈩?@V
GS
= 10 V
鈥?Low gate charge ( typical 110 nC)
鈥?Low Crss ( typical 65 pF)
鈥?Fast switching
鈥?100% avalanche tested
鈥?Improved dv/dt capability
廬
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild鈥檚 proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
ciency switch mode power supply, electronic lamp ballast based
on half bridge.
D
G
G D
S
TO-247
FQH Series
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J,
T
STG
T
L
Drain-Source Voltage
Drain Current
Drain Current
Gate-Source voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(T
C
= 25擄C)
- Derate above 25擄C
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Parameter
- Continuous (T
C
= 25擄C)
- Continuous (T
C
= 100擄C)
- Pulsed
(Note 1)
FQH35N40
400
35
22
140
鹵30
1600
35
31
4.5
310
2.5
-55 to +150
300
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/擄C
擄C
擄C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8鈥?from Case for 5 Seconds
Thermal Characteristics
Symbol
R
胃JC
R
胃CS
R
胃JA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
Min.
--
0.24
--
Max.
0.4
--
40
Unit
擄C/W
擄C/W
擄C/W
漏2005 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
FQH35N40 Rev. A