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FQD4N20L Datasheet

  • FQD4N20L

  • 200V LOGIC N-Channel MOSFET

  • 522.08KB

  • 9頁

  • FAIRCHILD

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FQD4N20L / FQU4N20L
December 2000
QFET
FQD4N20L / FQU4N20L
200V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild鈥檚 proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state
resistance,
provide
superior
switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for high efficiency switching DC/DC converters,
switch mode power supplies, and motor control.
TM
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
3.2A, 200V, R
DS(on)
= 1.35鈩?@V
GS
= 10 V
Low gate charge ( typical 4.0 nC)
Low Crss ( typical 6.0 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Low level gate drive requirement allowing direct
operation from logic drivers
D
D
!
"
G
!
G
S
! "
"
"
D-PAK
FQD Series
I-PAK
G D S
FQU Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25擄C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25擄C)
Drain Current
- Continuous (T
C
= 100擄C)
Drain Current
- Pulsed
(Note 1)
FQD4N20L / FQU4N20L
200
3.2
2.02
12.8
鹵
20
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/擄C
擄C
擄C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25擄C) *
Power Dissipation (T
C
= 25擄C)
52
3.2
3.0
5.5
2.5
30
0.24
-55 to +150
300
T
J
, T
STG
T
L
- Derate above 25擄C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8鈥?from case for 5 seconds
Thermal Characteristics
Symbol
R
胃JC
R
胃JA
R
胃JA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
4.17
50
110
Units
擄C/W
擄C/W
擄C/W
* When mounted on the minimum pad size recommended (PCB Mount)
漏2000 Fairchild Semiconductor International
Rev. A2, December 2000

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