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FQB5N50C Datasheet

  • FQB5N50C

  • 500V N-Channel MOSFET

  • 634.97KB

  • 9頁

  • FAIRCHILD

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FQB5N50C/FQI5N50C
QFET
FQB5N50C/FQI5N50C
500V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild鈥檚 proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
TM
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
5A, 500V, R
DS(on)
= 1.4
鈩?/div>
@V
GS
= 10 V
Low gate charge ( typical 18nC)
Low Crss ( typical 15pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
D
!
"
G
S
D
2
-PAK
FQB Series
I
2
-PAK
G D S
FQI Series
G
!
! "
"
"
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
T
C
= 25擄C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25擄C)
Drain Current
- Continuous (T
C
= 100擄C)
Drain Current
- Pulsed
(Note 1)
FQB5N50C/FQI5N50C
500
5
2.9
20
鹵
30
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/擄C
擄C
擄C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
C
= 25擄C)
300
5
7.3
4.5
73
0.58
-55 to +150
300
- Derate above 25擄C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
胃JC
R
胃JA
R
胃JA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
1.71
40
62.5
Units
擄C/W
擄C/W
擄C/W
漏2003 Fairchild Semiconductor Corporation
Rev. A, August 2003

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