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FPD85308 Datasheet

  • FPD85308

  • Panel Timing Controller

  • 31頁(yè)

  • NSC

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FPD85308 Panel Timing Controller
PRELIMINARY
May 2001
FPD85308
Panel Timing Controller
General Description
The FPD85308 Panel Timing Controller is an integrated
FPD-Link based TFT-LCD timing controller. It resides on the
flat panel display and provides the interface signal routing
and timing control between graphics or video controllers and
a TFT-LCD system. FPD-Link is a low power, low electro-
magnetic interference interface used between this controller
and the host system.
The FPD85308 chip links the panel鈥檚 system interface to the
LCD display via a ten wire LVDS data bus. The data is then
routed to the source and gate display drivers. Both XGA and
SVGA resolutions are supported.
The FPD85308 is programmable via an optional external
serial EEPROM. Reserved space in the EEPROM is avail-
able for display identification information. The system can
access the EEPROM to read the display identification data
or program initialization values used by the FPD85308.
Features
n
FPD-Link System Interface utilizes Low Voltage
Differential Signaling (LVDS).
n
Supports Graphics Controllers with Spread Spectrum
interfaces for lower EMI
n
System programmable via EEPROM
n
Suitable for notebook and monitor applications
n
8-bit or 6-bit system interface
n
XGA or SVGA capable
n
Supports single or dual port column drivers
n
Programmable outputs provide customized control for
standard or in-house column drivers and row drivers
n
Programmable slew rate controlled outputs on CD
interface for reduced EMI
n
Polarity pin reduces CD data bus switching
n
CMOS circuitry operates from a 3.3V supply
System Diagram
DS101356-1
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 2001 National Semiconductor Corporation
DS101356
www.national.com

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