鈥?/div>
DESCRIPTION AND APPLICATIONS
The FPD200is an AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (PHEMT),
featuring a 0.25
碌m
by 200
碌m
Schottky barrier gate, defined by high-resolution stepper-based
photolithography. The recessed and offset Gate structure minimizes parasitics to optimize
performance. The epitaxial structure and processing have been optimized for reliable medium-
power applications. The FPD200 also features Si
3
N
4
passivation and is available in a low cost
plastic package.
Typical applications include commercial and other narrowband and broadband high-performance
amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output
amplifiers, and medium-haul digital radio transmitters.
鈥?/div>
ELECTRICAL SPECIFICATIONS AT 22擄C
Parameter
Power at 1dB Gain Compression
Power Gain at P
1dB
Power-Added Efficiency
Maximum Stable Gain (S
21
/S
12
)
f
= 12 GHz
f
= 24 GHz
Saturated Drain-Source Current
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Gate-Source Breakdown Voltage
Gate-Drain Breakdown Voltage
Thermal Resistivity (see Notes)
I
DSS
I
MAX
G
M
I
GSO
|V
P
|
|V
BDGS
|
|V
BDGD
|
胃
JC
V
DS
= 1.3 V; V
GS
= 0 V
V
DS
= 1.3 V; V
GS
鈮?/div>
+1 V
V
DS
= 1.3 V; V
GS
= 0 V
V
GS
= -5 V
V
DS
= 1.3 V; I
DS
= 0.2 mA
I
GS
= 0.2 mA
I
GD
= 0.2 mA
V
DS
> 3V
0.7
12.0
14.5
Symbol
P
1dB
G
1dB
PAE
SSG
V
DS
= 5 V; I
DS
= 50% I
DSS
16
10.5
45
17
12
60
120
80
1
1.0
14.0
16.0
280
10
1.3
75
mA
mA
mS
碌A(chǔ)
V
V
V
擄C/W
dB
Test Conditions
V
DS
= 5 V; I
DS
= 50% I
DSS
V
DS
= 5 V; I
DS
= 50% I
DSS
V
DS
= 5V; I
DS
= 50% I
DSS
;
P
OUT
= P
1dB
Min
18
10.5
Typ
19
12.0
45
Max
Units
dBm
dB
%
RF SPECIFICATIONS MEASURED AT
f
= 12 GHz USING CW SIGNAL
Phone:
+1 408 850-5790
Fax:
+1 408 850-5766
http://www.filtronic.co.uk/semis
Revised:
11/17/04
Email:
sales@filcsi.com
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