鈥?/div>
3-channels
100/140 Ms/s conversion rate
Programmable Clamps
500ps PLL clock jitter
Adjustable Gain and offset
Internal Reference Voltage
I
2
C/SMBus compatible Serial Port
Pin Compatible with AD9884A
PLL. Output data is released through either one port at full
rate or both ports, each running at half-rate. Setup and control
is via registers, accessible through an SMBus/I
2
C compatible
serial port.
Input amplitude range is 500鈥?000mV with either DC or AC
coupling. Lower reference of AC coupled inputs is estab-
lished with input clamps that are either internally generated
or externally provided.
Common to the three channels are clamp pulses, a bandgap
reference voltage and clocks derived from a PLL or an external
source. Digital data levels are 2.5鈥?.3 volt CMOS compliant.
Power can be derived from a single +3.3 Volt power supply.
Package is a 128-lead MQFP. Performance speci鏗乧ations are
guaranteed over 0擄C to 70擄C range.
Product Number
FMS988AKAC100
FMS988AKAC140
Speed
108 Ms/s
140 Ms/s
Applications
鈥?Flat panel displays and projectors
鈥?RGB Graphics Processing
Description
As a fully integrated analog interface, the FMS9884A can digi-
tize RGB graphics with resolutions up to 1280 x 1024/75Hz
refresh or 1600 x 1200/85Hz using alternate pixel sampling.
ADC sampling clock can be derived from either an external
source or incoming horizontal sync signal using the internal
Block Diagram
Gain &
Offset
A/D
Converter
RPD
7-0
Switch
DRB
7-0
GPD
7-0
Switch
DRA
7-0
R
IN
Clamp
G
IN
Clamp
Gain &
Offset
A/D
Converter
DGA
7-0
DGB
7-0
B
IN
Clamp
Gain &
Offset
A/D
Converter
BPD
7-0
Switch
DBA
7-0
DBB
7-0
VREFIN
CLAMP
INVSCK
XCK
HSIN
COAST
LPF
SDA
SCL
A
0
A
1
PWRDN
HS
PLL
PXCK
SCK
Reference
VREFOUT
Timing
Generator
ICLAMP
DCK
DCK
HSOUT
Control
ACS
IN
SYNC
STRIPPER
DCS
OUT
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