FIN1531 5V LVDS 4-Bit High Speed Differential Driver
August 2001
Revised August 2001
FIN1531
5V LVDS 4-Bit High Speed Differential Driver
General Description
This quad driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates 5V TTL/CMOS signal levels to
LVDS levels with a typical differential output swing of 350
mV which provides low EMI at ultra low power dissipation
even at high frequencies. This device is ideal for high
speed transfer of clock and data.
The FIN1531 can be paired with its companion receiver,
the FIN1532, or with any other Fairchild LVDS receiver.
Features
s
Greater than 400Mbs data rate
s
5V power supply operation
s
400ps max differential pulse skew
s
2.0ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Pin compatible with equivalent RS-422 and
PECL devices
s
16-Lead SOIC and TSSOP packages save space
Ordering Code:
Order Number
FIN1531M
FIN1531MTC
Package Number
M16A
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Function Table
Input
EN
H
H
H
X
X
X
L
H
=
HIGH Logic Level
X
=
Don鈥檛 Care
Connection Diagram
Outputs
D
IN
H
L
OPEN
H
L
OPEN
X
D
OUT+
H
L
L
H
L
L
Z
D
OUT鈭?/div>
L
H
H
L
H
H
Z
EN
X
X
X
L
L
L
H
L
=
LOW Logic Level
Z
=
High Impedance
Pin Descriptions
Pin Name
D
IN1
, D
IN2
, D
IN3
, D
IN4
Description
5V TTL/CMOS Data Input
D
OUT1+
, D
OUT2
+
, D
OUT3+
, D
OUT4+
Non-inverting LVDS Output
D
OUT1鈭?/div>
, D
OUT2鈭?/div>
, D
OUT3鈭?/div>
, D
OUT4鈭?/div>
Inverting LVDS Output
EN
EN
V
CC
GND
Driver Enable Pin
Inverting Driver Enable Pin
Power Supply
Ground
漏 2001 Fairchild Semiconductor Corporation
DS500505
www.fairchildsemi.com
FIN1531MTC相關(guān)型號(hào)PDF文件下載
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