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FIN12ACGFX Datasheet

  • FIN12ACGFX

  • Low Voltage 12-Bit Bi-Directional Serializer/Deserializer wi...

  • 1820.73KB

  • 21頁

  • FAIRCHILD

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Preliminary
FIN12AC
PSerDes樓
April 2005
Revised May 2005
FIN12AC
PSerDes樓
Low Voltage 12-Bit Bi-Directional Serializer/Deserializer
with Multiple Frequency Ranges (Preliminary)
General Description
The FIN12AC is a 12-bit serializer capable of running a
parallel frequency range between 5MHz and 56MHz. The
frequency range is selected by the S1 and S2 control sig-
nals. The bi-directional data flow is controlled through use
of a direction (DIRI) control pin. The devices can be config-
ured to operate in a unidirectional mode only by hardwiring
the DIRI pin. An internal PLL generates the required bit
clock frequency for transfer across the serial link. Options
exist for dual or single PLL operation dependent upon sys-
tem operational parameters. The device has been
designed for low power operation and utilizes Fairchild Pro-
prietary Low Power CTL interface. The device also sup-
ports an ultra low power Power-Down mode for conserving
power in battery operated applications.
Features
s
Low power consumption
s
Fairchild Proprietary Low Power CTL interface
s
LVCMOS parallel I/O interface
鈥?2 mA source/sink current
鈥?Over-voltage tolerant control signals
s
I/O power supply range between 1.65V and 3.6V
s
Analog Power Supply range of 2.775V
r
5%
s
Multi-Mode operation allows for a single device to
operate as Serializer or Deserializer
s
Internal PLL with no external components
s
Standby Power-Down mode support
s
Small footprint 32-terminal MLP packaging
s
Built in differential termination
s
Supports external CKREF frequencies between
5MHz and 56MHz
s
Serialized data rate up to 784Mb/s
Ordering Code:
Order Number
FIN12ACGFX
(Preliminary)
FIN12ACMLX
Package Number
BGA42A
MLP032A
Package Description
Pb-Free 42-Ball Ultra Small Scale Ball Grid Array (USS-BGA), JEDEC MO-195,
3.5mm Wide
Pb-Free 32-Terminal Molded Leadless Package (MLP), Quad, JEDEC MO-220, 5mm
Square
Pb-Free package per JEDEC J-STD-020B.
BGA and MLP packages available in Tape and Reel only.
P
SerDes
樓
is a trademark of Fairchild Semiconductor Corporation.
漏 2005 Fairchild Semiconductor Corporation
DS500915
www.fairchildsemi.com

FIN12ACGFX 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 接口 - 串行器，解串行器

  • SerDes™

  • 串行器/解串器

  • 560Mbps

  • LVCMOS

  • LVCMOS

  • 12

  • 12

  • 1.65 V ~ 3.6 V

  • -30°C ~ 70°C

  • 表面貼裝

  • 42-VFBGA

  • 42-BGA

  • 帶卷 (TR)

  • FIN12ACGFXTR

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