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FDS8947A Datasheet

  • FDS8947A

  • Dual P-Channel Enhancement Mode Field Effect Transistor

  • 5頁

  • FAIRCHILD

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March 1998
FDS8947A
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
Features
-4.0 A, -30 V. R
DS(ON)
= 0.052
鈩?/div>
@ V
GS
= -10 V
R
DS(ON)
= 0.080
鈩?/div>
@ V
GS
= -4.5 V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
SOT-23
SuperSOT
TM
-6
SuperSOT
TM
-8
SO-8
SOT-223
SOIC-16
D2
D1
D1
D2
5
4
3
2
1
DS A
F 7
4
89
pin
1
6
SO-8
S1
G1
S2
G2
7
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25
o
C unless other wise noted
FDS8947A
-30
-20
(Note 1a)
Units
V
V
A
W
- 4.0
-20
2
1.6
1
0.9
-55 to 150
78
40
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
,T
STG
R
胃
JA
R
胃
JC
Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
擄C
擄C/W
擄C/W
THERMAL CHARACTERISTICS
(Note 1a)
(Note 1)
漏 1998 Fairchild Semiconductor Corporation
FDS8947A Rev.B

FDS8947A 產(chǎn)品屬性

  • 2,500

  • 分離式半導(dǎo)體產(chǎn)品

  • FET - 陣列

  • -

  • 2 個(gè) P 溝道（雙）

  • 邏輯電平門

  • 30V

  • 4A

  • 52 毫歐 @ 4A，10V

  • 3V @ 250µA

  • 27nC @ 10V

  • 730pF @ 15V

  • 900mW

  • 表面貼裝

  • 8-SOIC（0.154"，3.90mm 寬）

  • 8-SOICN

  • 帶卷 (TR)

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