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FDG6301N Datasheet

  • FDG6301N

  • Dual N-Channel, Digital FET

  • 8頁

  • FAIRCHILD

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上傳產品規(guī)格書

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July 1999
FDG6301N
Dual N-Channel, Digital FET
General Description
These dual N-Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. This device has been
designed especially for low voltage applications as a
replacement for bipolar digital transistors and small
signal MOSFETs.
Features
25 V, 0.22 A continuous, 0.65 A peak.
R
DS(ON)
= 4
鈩?/div>
@ V
GS
= 4.5 V,
R
DS(ON)
= 5
鈩?/div>
@ V
GS
= 2.7 V.
Very low level gate drive requirements allowing direct
operation in 3 V circuits (V
GS(th)
< 1.5 V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
Compact industry standard SC70-6 surface mount
package.
SC70-6
SOT-23
SuperSOT
TM
-6
SuperSOT
TM
-8
SO-8
SOT-223
D1
G2
S2
1 or 4
*
.01
2 or 5
6 or 3
SC70-6
S1
G1
D2
3 or 6
5 or 2
4 or 1
*
*
The pinouts are symmetrical; pin 1 and 4 are interchangeable.
Units inside the carrier can be of either orientation and will not affect the functionality of the device.
Absolute Maximum Ratings
Symbol
Parameter
T
A
= 25擄C unless otherwise noted
FDG6301N
Units
V
DSS
V
GSS
I
D
P
D
T
J
,T
STG
ESD
Drain-Source Voltage
Gate-Source Voltage
Drain/Output Current
- Continuous
- Pulsed
Maximum Power Dissipation
(Note 1)
25
8
0.22
0.65
0.3
-55 to 150
6.0
V
V
A
W
擄C
kV
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model(100 pF / 1500
鈩?/div>
)
Thermal Resistance, Junction-to-Ambient
THERMAL CHARACTERISTICS
R
胃JA
415
擄C/W
FDG6301N Rev.E
1

FDG6301N 產品屬性

  • High Voltage Switches for Power Processing

  • 3,000

  • 分離式半導體產品

  • FET - 陣列

  • -

  • 2 個 N 溝道（雙）

  • 邏輯電平門

  • 25V

  • 220mA

  • 4 歐姆 @ 220mA，4.5V

  • 1.5V @ 250µA

  • 0.4nC @ 4.5V

  • 9.5pF @ 10V

  • 300mW

  • 表面貼裝

  • 6-TSSOP，SC-88，SOT-363

  • SC-70-6

  • 帶卷 (TR)

  • FDG6301NTR

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