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FDD603AL Datasheet

  • FDD603AL

  • N-Channel Logic Level Enhancement Mode Field Effect Transist...

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FDD603AL
July 1999
FDD603AL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
This N-Channel logic level enhancement mode power
field effect transistor is produced using Fairchild聮s
proprietary, high cell density, DMOS technology. This
very high density process is tailored to minimize on-
state resistance. These devices are particularly suited
for low voltage applications such as DC/DC converters
and high efficiency switching circuits where fast
switching, low in-line power loss, and resistance to
transients are needed.
Features
聲
33 A, 30 V. R
DS(ON)
= 0.023
鈩?/div>
@ V
GS
= 10 V
R
DS(ON)
= 0.037
鈩?/div>
@ V
GS
= 4.5 V.
聲
聲
聲
Critical DC electrical parameters specified at elevated
temperature.
Rugged avalanche-rated internal source-drain diode
can eliminate the need for external Zener Diode.
High density cell design for extremely low R
DS(ON)
.
Applications
聲
聲
DC/DC converters
Motor drives
D
D
G
S
TO-252
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
Drain-Source Voltage
Gate-Source Voltage
Maximum Drain Current - Continuous
Maximum Drain Current
P
D
T
A
= 25擄C
-Pulsed
o
G
S
T
C
=25
o
C unless otherwise noted
Parameter
Ratings
30
(Note 1)
(Note 1a)
Units
V
V
A
鹵20
33
9.5
80
39
3.2
1.3
-55 to +150
Maximum Power Dissipation @ T
C
= 25 C
T
A
= 25 C
T
A
= 25 C
o
o
(Note 1)
(Note 1a)
(Note 1b)
W
T
J
, T
stg
Operating and Storage Junction Temperature Range
擄C
Thermal Characteristics
R
胃
JC
R
胃
JA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
(Note 1)
(Note 1a)
(Note 1b)
2.5
40
96
擄C/W
擄C/W
擄C/W
Package Marking and Ordering Information
Device Marking
FDD603AL
錚?999
Fairchild Semiconductor Corporation
Device
FDD603AL
Reel Size
13鈥欌€?/div>
Tape W idth
16mm
Quantity
2500
FDD603AL, Rev. B

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