FDB33N25 / FDI33N25 250V N-Channel MOSFET
FDB33N25 / FDI33N25
250V N-Channel MOSFET
Features
鈥?33A, 250V, R
DS(on)
= 0.094惟 @V
GS
= 10 V
鈥?Low gate charge ( typical 36.8 nC)
鈥?Low C
rss
( typical 39 pF)
鈥?Fast switching
鈥?100% avalanche tested
鈥?Improved dv/dt capability
UniFET
Description
May 2006
TM
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild鈥檚 proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
D
D
G
G
S
D
2
-PAK
FDB Series
G D S
I
2
-PAK
FDI Series
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J,
T
STG
T
L
Drain-Source Voltage
Drain Current
Drain Current
Gate-Source voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(T
C
= 25擄C)
- Derate above 25擄C
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Parameter
- Continuous (T
C
= 25擄C)
- Continuous (T
C
= 100擄C)
- Pulsed
(Note 1)
FDB33N25 / FDI33N25
250
33
20.4
132
鹵30
918
33
23.5
4.5
235
1.89
-55 to +150
300
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/擄C
擄C
擄C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8鈥?from Case for 5 Seconds
Thermal Characteristics
Symbol
R
胃JC
R
胃JA
*
R
胃JA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient*
Thermal Resistance, Junction-to-Ambient
Min.
--
--
--
Max.
0.53
40
62.5
Unit
擄C/W
擄C/W
擄C/W
* When mounted on the minimum pad size recommended (PCB Mount)
漏2006 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
FDB33N25 / FDI33N25 Rev A