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FAN6555 Datasheet

  • FAN6555

  • 2A DDR Bus Termination Regulator

  • 12頁

  • FAIRCHILD

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www.fairchildsemi.com
FAN6555
2A DDR Bus Termination Regulator
Features
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Can source and sink up to 2A continous, 3A peak
No heatsink required
Integrated Power MOSFETs
Generates termination voltages for DDR SDRAM
V
REF
input available for external voltage divider
Separate voltages for V
CCQ
and PV
DD
Buffered V
REF
output
V
OUT
of 鹵3% or less at 2A
Minimum external components
16-pin SOIC package
-40擄C to +85擄C operating temperature range
Shutdown for standby or suspend mode operation
Thermal Shutdown
鈮?/div>
130潞C
Description
The FAN6555 switching regulator is designed to convert
voltage supplies ranging from 2.3V to 4V into a desired out-
put voltage or termination voltage for DDR SDRAM mem-
ory. The FAN6555 can be implemented to produce regulated
output voltages in two different modes. In the default mode,
when the V
REF
pin is open, the FAN6555 output voltage is
50% of the voltage applied to V
CCQ
. The FAN6555 can also
be used to produce various user-de鏗乶ed voltages by forcing a
voltage on the VREF
IN
pin. In this case, the output voltage
follows the input VREF
IN
voltage. The switching regulator
is capable of sourcing or sinking up to 2A of current while
regulating an output V
TT
voltage to within 3% or less.
Transient output currents of 鹵3A can also be accommodated.
The FAN6555 can also be used in conjunction with series
termination resisitors to provide an excellent voltage source
for active termination schemes of high speed transmission
lines as those seen in high speed memory buses and distrib-
uted backplane designs.
Block Diagram
15
16
14
1
9
VDD
VDD
12
2
7
VCCQ
AVCC
VREFOUT
SHDN
PVDD1
PVDD2
VL1
(VOUT)
3
OSCILLATOR/
RAMP
GENERATOR
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200k鈩?/div>
+
VREF BUFFER
VREFIN
11
200k鈩?/div>
AGND
13
+
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R
+
ERROR AMP
RAMP
COMPARATOR
Q
S
Q
6
VL2
(VOUT)
VFB
10
8
DGND
4
PGND1
5
PGND2
REV. 1.1.3 8/4/03

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