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EN29LV512 Datasheet

  • EN29LV512

  • ETC [512 Kbit (64K x 8-bit ) Uniform Sector, CMOS 3.0 Volt-...

  • ETC

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EN29LV512
EN29LV512
512 Kbit (64K x 8-bit ) Uniform Sector,
CMOS 3.0 Volt-only Flash Memory
FEATURES
鈥?/div>
Single power supply operation
- Full voltage range: 2.7-3.6 volt read and write
operations for battery-powered applications.
- Regulated voltage range: 3.0-3.6 volt read
and write operations for high performance
3.3 volt microprocessors.
鈥?/div>
High performance
- Full voltage range: access times as fast as 55
ns
- Regulated voltage range: access times as fast
as 45ns
鈥?/div>
Low power consumption (typical values at 5
MHz)
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1
碌A(chǔ)
typical standby current (standard access
time to active mode)
鈥?/div>
-
-
-
-
Flexible Sector Architecture:
Four 16 Kbyte sectors
Supports full chip erase
Individual sector erase supported
Sector protection and unprotection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
鈥?/div>
High performance program/erase speed
- Byte program time: 8碌s typical
- Sector erase time: 500ms typical
鈥?/div>
JEDEC Standard program and erase
commands
鈥?/div>
JEDEC standard
DATA
polling and toggle bits
feature
鈥?/div>
Single Sector and Chip Erase
鈥?/div>
Embedded Erase and Program Algorithms
鈥?/div>
Erase Suspend / Resume modes:
Read or program another Sector during
Erase Suspend Mode
鈥?/div>
triple-metal double-poly triple-well CMOS Flash
Technology
鈥?/div>
Low Vcc write inhibit < 2.5V
鈥?/div>
>100K program/erase endurance cycle
da0.
鈥?/div>
Package options
- 8mm x 20mm 32-pin TSOP (Type 1)
- 8mm x 14mm 32-pin TSOP (Type 1)
- 32-pin PLCC
-
鈥?/div>
Commercial and industrial Temperature Range
GENERAL DESCRIPTION
The EN29LV512 is a 512-Kbit, electrically erasable, read/write non-volatile flash memory, organized
as 65,536 bytes. Any byte can be programmed typically in 8碌s. The EN29LV512 features 3.0V
voltage read and write operation, with access times as fast as 45ns to eliminate the need for WAIT
states in high-performance microprocessor systems.
The EN29LV512 has separate Output Enable (
OE
), Chip Enable (
CE
), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single
Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
This Data Sheet may be revised by subsequent versions
1
or modifications due to changes in technical specifications.
漏2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. B, Issue Date: 2004/01/05

EN29LV512 PDF文件相關(guān)型號

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