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EMD4DXV6T5 Datasheet

  • EMD4DXV6T5

  • ON Semiconductor [Dual Bias Resistor Transistors NPN and PN...

  • ONSEMI

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EMD4DXV6T1,
EMD4DXV6T5
Preferred Devices
Dual Bias Resistor
Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
(3)
http://onsemi.com
(2)
R
1
Q
1
Q
2
R
2
(4)
R
1
(5)
(6)
R
2
(1)
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base鈭抏mitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMD4DXV6T1 series,
two complementary BRT devices are housed in the SOT鈭?63 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
6
1
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These are Pb鈭扚ree Devices
SOT鈭?63
CASE 463A
STYLE 1
MAXIMUM RATINGS
(T
A
= 25擄C unless otherwise noted, common for Q
1
and Q
2
, 鈭?minus sign for Q
1
(PNP) omitted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
1
U7 M
G
G
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device Dissipation
T
A
= 25擄C (Note 1)
Derate above 25擄C (Note 1)
Thermal Resistance,
Junction-to-Ambient (Note 1)
Total Device Dissipation
T
A
= 25擄C (Note 1)
Derate above 25擄C
Thermal Resistance,
Junction-to-Ambient (Note 1)
Junction and Storage Temperature
Symbol
P
D
Max
357
2.9
350
500
4.0
250
鈭?5 to +150
Unit
mW
mW/擄C
擄C/W
U7 = Specific Device Code
M = Date Code
G
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
R
qJA
P
D
ORDERING INFORMATION
mW
mW/擄C
擄C/W
EMD4DXV6T5G
T
J
, T
stg
擄C
Device
EMD4DXV6T1G
R
qJA
Package
SOT鈭?63
(Pb鈭扚ree)
SOT鈭?63
(Pb鈭扚ree)
Shipping
鈥?/div>
4000/Tape & Reel
8000/Tape & Reel
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR鈭? board with minimum mounting pad.
鈥燜or information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred
devices are recommended choices for future use
and best overall value.
漏
Semiconductor Components Industries, LLC, 2005
1
October, 2005鈭?Rev. 1
Publication Order Number:
EMD4DXV6/D

EMD4DXV6T5 產(chǎn)品屬性

  • ON Semiconductor

  • Transistors Switching (Resistor Biased)

  • Dual

  • NPN

  • 47 KOhms at NPN, 10 KOhms at PNP

  • 1 at NPN, 0.21 at PNP

  • SMD/SMT

  • SOT-553-5

  • 50 V

  • 0.1 A

  • 100 mA

  • 357 mW

  • + 150 C

  • Reel

  • - 55 C

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