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Overview
The EM63A165 SDRAM is a high-speed CMOS
synchronous DRAM containing 256 Mbits. It is internally
configured as 4 Banks of 2M word x 16 DRAM with a
synchronous interface (all signals are registered on the
positive edge of the clock signal, CLK). Read and write
accesses to the SDRAM are burst oriented; accesses
start at a selected location and continue for a
programmed number of locations in a programmed
sequence. Accesses begin with the registration of a
BankActivate command which is then followed by a Read
or Write command.
The EM63A165 provides for programmable Read
or Write burst lengths of 1, 2, 4, 8, or full page, with a
burst termination option. An auto precharge function may
be enabled to provide a self-timed row precharge that is
initiated at the end of the burst sequence. The refresh
functions, either Auto or Self Refresh are easy to use.
By having a programmable mode register, the
system can choose the most suitable modes to maximize
its performance. These devices are well suited for
applications requiring high memory bandwidth and
particularly well suited to high performance PC
applications.
Key Specifications
EM63A165
-
6/7
6/7 ns
5/5.4 ns
42/45 ns
60/63 ns
t
CK3
t
AC3
t
RAS
t
RC
Clock Cycle time(min.)
Access time from CLK(max.)
Row Active time(min.)
Row Cycle time(min.)
Ordering Information
Part Number
EM63A165TS-6G
EM63A165TS-7G
Frequency Package
166MHz
143MHz
TSOP II
TSOP II
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.