eCOG1 Microcontroller
Low Power Communications Processor
PRELIMINARY
The eCOG1 microcontroller is a low-power microcontroller based on a 16-bit Harvard architecture
with a 24-bit word code linear address space (32Mbyte) and 16-bit word linear data address
space (128Kbytes). It is available in a 128-pin LQFP with or without the IntAct high-speed serial
interface. A comprehensive toolset and C Compiler are available.
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ChA
0 to 25MHz 3.3V processor
Powerful arithmetic operations
Barrel Shifter
Harvard Architecture
64Kx16 Data Memory
16Mx16 Program Memory
Built in Emulator (eICE)
Low power operation
64Kbytes FLASH EPROM
4Kbytes SRAM
MMU
Power-saving code cache
Code security feature
External Host Interface
External Memory Interface
Fast Vectored Interrupts
Dual UART
Dual USART
Smart Card Interface
SPI
I2C
Consumer IR/IRDA
4 channel 12-bit A/D
Parallel Interface
ChB
Stream
Up
Down
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5 Multi Purpose Timers
Watchdog Timer
Long Interval Timer
Real Time Clock
PWM timers
Temperature Sensor
Supply Voltage Sensor
Power-On Reset
General Purpose I/O
25MHz from watch XTAL
Interfaces to 8/16/32-bit parts
USART/SPI/IR
/IrDA/I2C/
Smart Card IF
Dual
UART
4KBytes
iRAM
IntAct
EHI
Data
Control
PWM
Switching Multiplexer
EMI
24 Bit
Addr/Data
8 Bit Data
12 Bit
ADC
Vdd
Sensor
MUX
Temp
Sensor
4
Vin
PIF
64K
Bytes
Flash
EPROM
16/32 Bit
Interface
MMU
GPIO
29 Bit I/O
or Control
Power
On
Reset
Interupt
Requests
Register
Block
Code
Cache
System
Clock
Timers
External
Triggers
Clock Inputs
IRC
eCOG1
CPU Core
eICE
eICE_miso
eICE_mosi
eICE_Clock
eICE_Load#
eICE_CS
Reset_In
Figure 1 鈥?Internal Block Diagram
This document describes a device that is currently at pre-production status. Some specifications or descriptions may change.
V3.1
www.cyantechnology.com
1-Mar-2002
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eCOG1 Microcontroller
ETC