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EBS52UC8APSA Datasheet

  • EBS52UC8APSA

  • 512MB SDRAM S.O.DIMM

  • 147.18KB

  • 14頁

  • ELPIDA

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DATA SHEET
512MB SDRAM S.O.DIMM
EBS52UC8APSA (64M words
脳
64 bits, 2 bank)
Description
The EBS52UC8APSA is 64M words
脳
64 bits, 2 banks
Synchronous Dynamic RAM Small Outline Dual In-line
Memory Module (S.O.DIMM), mounted 16 pieces of
256M bits SDRAM sealed in
碌BGA
錚?/div>
package. This
module provides high density and large quantities of
memory in a small space without utilizing the surface
mounting technology.
Decoupling capacitors are
mounted on power supply line for noise reduction.
Note : Do not push the cover or drop the modules in
order to protect from mechanical defects, which
would be electrical defects.
Features
鈥?/div>
Fully compatible with 8 bytes S.O.DIMM: JEDEC
standard outline
鈥?/div>
144-pin socket type small outline dual in line memory
module (S.O.DIMM)
錚?/div>
PCB height: 31.75mm (1.25inch )
錚?/div>
Lead pitch: 0.80mm
鈥?/div>
3.3V power supply
鈥?/div>
Clock frequency: 133MHz (max.)
鈥?/div>
LVTTL interface
鈥?/div>
Data bus width:
脳
64 non-ECC
鈥?/div>
Single pulsed /RAS
鈥?/div>
4 Banks can operates simultaneously and
independently
鈥?/div>
Burst read/write operation and burst read/single write
operation capability
鈥?/div>
Programmable burst length (BL): 1, 2, 4, 8, Full page
鈥?/div>
2 variations of burst sequence
錚?/div>
Sequential
錚?/div>
Interleave
鈥?/div>
Programmable /CAS latency (CL): 2, 3
鈥?/div>
Byte control by DQMB
鈥?/div>
Refresh cycles: 8192 refresh cycles/64ms
鈥?/div>
2 variations of refresh
錚?/div>
Auto refresh
錚?/div>
Self refresh
Document No. E0240E20 (Ver. 2.0)
Date Published May 2002 (K) Japan
URL: http://www.elpida.com
錚〦lpida
Memory, Inc. 2001-2002

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