M390S2858CT1
M390S2858CT1 SDRAM DIMM
PC133 Registered DIMM
128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD
GENERAL DESCRIPTION
The Samsung M390S2858CT1 is a 128M bit x 72 Synchro-
nous Dynamic RAM high density memory module. The Sam-
sung M390S2858CT1 consists of eighteen CMOS Stacked
128Mx4 bit Synchronous DRAMs in two TSOP-II 400mil pack-
ages, three 18-bits Drive ICs for input control signal, one PLL
in 24-pin TSSOP package for clock and one 2K EEPROM in 8-
pin TSSOP package for Serial Presence Detect on a 168-pin
glass-epoxy substrate. Two 0.22uF and one 0.0022uF decou-
pling capacitors are mounted on the printed circuit board in
parallel for each SDRAM. The M390S2858CT1 is a Dual In-
line Memory Module and is intented for mounting into 168-pin
edge connector sockets.
Synchronous design allows precise cycle control with the use
of system clock. I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable laten-
cies allows the same device to be useful for a variety of high
bandwidth, high performance memory system applications.
FEATURE
鈥?Performance range
Part No.
M390S2858CT1-C7C
M390S2858CT1-C7A
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max Freq. (Speed)
133MHz(7.5ns @ CL=2)
133MHz (7.5ns @ CL=3)
Burst mode operation
Auto & self refresh capability (8192 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V
鹵
0.3V power supply
MRS cycle with address key programs
Latency (Access from column address)
Burst length (1, 2, 4 , 8 & Full page)
Data scramble (Sequential & Interleave)
鈥?All inputs are sampled at the positive going edge of the
system clock
鈥?Serial presence detect with EEPROM
鈥?PCB :
Height (1,700mil),
double sided component
PIN CONFIGURATIONS (Front side/back side)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front
V
SS
DQ0
DQ1
DQ2
DQ3
V
DD
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
DD
DQ14
DQ15
CB0
CB1
V
SS
NC
NC
V
DD
WE
DQM0
Pin
Front
Pin
Front
DQ18
DQ19
V
DD
DQ20
NC
*V
REF
*CKE1
V
SS
DQ21
DQ22
DQ23
V
SS
DQ24
DQ25
DQ26
DQ27
V
DD
DQ28
DQ29
DQ30
DQ31
V
SS
*CLK2
NC
*WP
**SDA
**SCL
V
DD
Pin
Back
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
CS1
RAS
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
DD
*CLK1
A12
V
SS
CKE0
CS3
DQM6
DQM7
*A13
V
DD
NC
NC
CB6
CB7
V
SS
DQ48
DQ49
Pin
Back
29 DQM1 57
58
CS0
30
59
31
DU
60
32
V
SS
61
33
A0
62
34
A2
63
35
A4
64
36
A6
65
37
A8
38 A10/AP 66
67
39
BA1
68
40
V
DD
69
41
V
DD
42 CLK0 70
71
43
V
SS
44
DU
72
73
45
CS2
46 DQM2 74
47 DQM3 75
76
48
DU
77
49
V
DD
78
50
NC
79
51
NC
80
52
CB2
81
53
CB3
82
54
V
SS
55 DQ16 83
56 DQ17 84
V
SS
85
86 DQ32
87 DQ33
88 DQ34
89 DQ35
V
DD
90
91 DQ36
92 DQ37
93 DQ38
94 DQ39
95 DQ40
V
SS
96
97 DQ41
98 DQ42
99 DQ43
100 DQ44
101 DQ45
102 V
DD
103 DQ46
104 DQ47
105 CB4
106 CB5
107
V
SS
NC
108
NC
109
110 V
DD
111 CAS
112 DQM4
141 DQ50
142 DQ51
143 V
DD
144 DQ52
NC
145
146 *V
REF
147 REGE
148
V
SS
149 DQ53
150 DQ54
151 DQ55
152
V
SS
153 DQ56
154 DQ57
155 DQ58
156 DQ59
157 V
DD
158 DQ60
159 DQ61
160 DQ62
161 DQ63
V
SS
162
163 *CLK3
NC
164
165 **SA0
166 **SA1
167 **SA2
168 V
DD
PIN NAMES
Pin Name
A0 ~ A12
BA0 ~ BA1
DQ0 ~ DQ63
CB0 ~ CB7
CLK0
CKE0
CS0 ~ CS3
RAS
CAS
WE
DQM0 ~ 7
V
DD
V
SS
*V
REF
REGE
SDA
SCL
SA0 ~ 2
DU
NC
*WP
Function
Address input (Multiplexed)
Select bank
Data input/output
Check bit (Data-in/data-out)
Clock input
Clock enable input
Chip select input
Row address strobe
Colume address strobe
Write enable
DQM
Power supply (3.3V)
Ground
Power supply for reference
Register enable
Serial data I/O
Serial clock
Address in EEPROM
Don鈥瞭 use
No connection
Write protection
* These pins are not used in this module.
**
These pins should be NC in the system
which does not support SPD.
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
REV. 0.1 Sept. 2001
DS_M390S2858CT1相關(guān)型號(hào)PDF文件下載
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