鈥?/div>
dsPIC33FJ64GP706
dsPIC33FJ64GP708
dsPIC33FJ64GP710
dsPIC33FJ128GP706
dsPIC33FJ128GP708
dsPIC33FJ256GP506
dsPIC33FJ256GP710
dsPIC33FJ64MC706
dsPIC33FJ64MC508
dsPIC33FJ64MC710
dsPIC33FJ128MC706
dsPIC33FJ128MC708
dsPIC33FJ256MC710
Silicon Errata Summary
The following list summarizes the errata described in
further detail through the remainder of this document:
1.
SPI with 1:1 Prescaler
The SPI modules do not function correctly when
the SPI clock prescale ratio is set to 1:1.
2.
SPI Master Reception for Bit Rates above 8
Mbps
SPI Master reception does not function correctly at
bit rates higher than 8 Mbps, if the data is sampled
at the middle of the serial clock period.
3.
ADC with Sample/Hold CH3
Sample/Hold amplifier CH3 does not function
correctly for the Analog-to-Digital Converter
modules.
4.
LATC and LATD Reads
The LATC and LATD register reads do not
function.
5.
DMA Single-Shot Mode
The Direct Memory Access Single-Shot mode
does not function correctly.
The following sections will describe the errata and work
around to these errata, where they may apply.
dsPIC33F Rev. A0 silicon is identified by performing a
鈥淩eset and Connect鈥?operation to the device using
MPLAB
廬
ICD 2 with MPLAB IDE v7.31 or later. The
following text is then visible under the MPLAB ICD 2
section in the output window in MPLAB IDE:
Setting Vdd source to target
Target
Device
dsPIC33FJ256GP710
found, revision = Rev 0x3000
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in future revisions of silicon.
漏
2006 Microchip Technology Inc.
DS80259A-page 1