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DS90CR581 Datasheet

  • DS90CR581

  • LVDS Transmitter 24-Bit Color Flat Panel Display (FPD) Link

  • 10頁

  • NSC

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DS90CR581 LVDS Transmitter 24-Bit Color Flat Panel Display (FPD) Link
May 1998
DS90CR581
LVDS Transmitter 24-Bit Color Flat Panel Display (FPD)
Link
General Description
The DS90CR581 transmitter converts 28 bits of CMOS/TTL
data into four LVDS (Low Voltage Differential Signaling) data
streams. A phase-locked transmit clock is transmitted in par-
allel with the data streams over a fifth LVDS link. Every cycle
of the transmit clock 28 bits of input data are sampled and
transmitted. At a transmit clock frequency of 40 MHz, 24 bits
of RGB data and 4 bits of LCD timing and control data
(FPLINE, FPFRAME, DRDY, CNTL) are transmitted at a rate
of 280 Mbps per LVDS data channel. Using a 40 MHz clock,
the data throughput is 140 Megabytes per second. This
transmitter is intended to interface to any of the FPD Link re-
ceivers.
The chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Features
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Up to 140 Megabyte/sec Bandwidth
Narrow bus reduces cable size and cost
290 mV swing LVDS devices for low EMI
Low power CMOS design
Power down mode
PLL requires no external components
Low profile 56-lead TSSOP package
Rising edge data strobe
Compatible with TIA/EIA-644 LVDS standard
Block Diagrams
DS90CR581
DS012487-29
Order Number DS90CR581MTD
See NS Package Number MTD56
Application
DS012487-2
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS012487
www.national.com

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