DS90CR286A/DS90CR216A +3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel
Link 鈥?66 MHz, +3.3V Rising Edge Data Strobe LVDS Receiver 21-Bit Channel Link鈥?66 MHz
June 1999
DS90CR286A/DS90CR216A
+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit
Channel Link鈥?66 MHz, +3.3V Rising Edge Strobe
LVDS Receiver 21-Bit Channel Link鈥?66 MHz
General Description
The DS90CR286A receiver converts the four LVDS data
streams (Up to 1.848 Gbps throughput or 231 Megabytes/
sec bandwidth) back into parallel 28 bits of CMOS/TTL data.
Also available is the DS90CR216A that converts the three
LVDS data streams (Up to 1.386 Gbps throughput or 173
Megabytes/sec bandwidth) back into parallel 21 bits of
CMOS/TTL data. Both Receivers鈥?outputs are Rising edge
strobe.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Features
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20 to 66 MHz shift clock support
50% duty cycle on receiver output clock
Best鈥搃n鈥揅lass Set & Hold Times on RxOUTPUTs
Rx power consumption
<
270 mW (typ)
@
66MHz Worst
Case
Rx Power-down mode
<
200碌W (max)
ESD rating
>
7 kV (HBM),
>
700V (EIAJ)
PLL requires no external components
Compatible with TIA/EIA-644 LVDS standard
Low profile 56-lead or 48-lead TSSOP package
Operating Temperature: 鈭?0藲C to +85藲C
Block Diagrams
DS90CR286A
DS90CR216A
DS100873-31
Order Number DS90CR216AMTD
See NS Package Number MTD48
DS100873-30
Order Number DS90CR286AMTD
See NS Package Number MTD56
TRI-STATE
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is a registered trademark of National Semiconductor Corporation.
漏 2000 National Semiconductor Corporation
DS100873
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