speed bus systems. The bus terminal characteristics of the
Transceiver Logic鈥?(BTL). BTL is a new logic signaling stan-
of backplane buses. BTL compatible transceivers feature
munity. This new standard eliminates the settling time de-
significantly higher bus transfer rates.
ments of the proposed IEEE 896 Futurebus draft standard. It
鈩?/div>
Trans-
ceivers but the trapezoidal feature has been removed to
improve the propagation delay. A stripline backplane is there-
fore required to reduce the crosstalk induced by the faster
rise and fall times. This device can drive a 10鈩?load with a
typical propagation delay of 3.5 ns for the driver and 5 ns for
the receiver.
When multiple devices are used to drive a parallel bus, the
driver enables can be tied together and used as a common
control line to get on and off the bus. The driver enable delay
is designed to be the same as the driver propagation delay in
order to provide maximum speed in this configuration. The
low input current on the enable pin eases the drive required
for the common control line.
The bus driver is an open collector NPN with a Schottky
diode in series to isolate the transistor output capacitance
from the bus when the driver is in the inactive state. The
active output low voltage is typically 1V. The bus is intended
to be operated with termination resistors (selected to match
the bus impedance) to 2.1V at both ends. Each of the
resistors can be as low as 20鈩?
Features
n
Fast single ended transceiver (typical driver enable and
receiver propagation delays are 3.5 ns and 5 ns)
n
Backplane Transceiver Logic (BTL) levels (1V logic
swing)
n
Less than 5 pF bus-port capacitance
n
Drives densely loaded backplanes with equivalent load
impedances down to 10鈩?/div>
n
4 transceivers in 20 pin PCC package
n
Specially designed for stripline backplanes
n
Separate bus ground returns for each driver to minimize
ground noise
n
High impedance, MOS and TTL compatible inputs
n
TRI-STATE
鈩?/div>
control for receiver outputs
n
Built-in bandgap reference provides accurate receiver
threshold
n
Glitch free power up/down protection on all outputs
n
Oxide isolated bipolar technology
Connection and Logic Diagram
00869801
Order Number DS3893AV
See NS Package Number V20A
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
TRAPEZOIDAL
鈩?/div>
and TURBOTRANSCEIVER
鈩?/div>
are trademarks of National Semiconductor Corp.
漏 2004 National Semiconductor Corporation
DS008698
www.national.com
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