DS26LV32AT 3V Enhanced CMOS Quad Differential Line Receiver
April 1999
DS26LV32AT
3V Enhanced CMOS Quad Differential Line Receiver
General Description
The DS26LV32A is a high speed quad differential CMOS re-
ceiver that meets the requirements of both TIA/EIA-422-B
and ITU-T V.11. The CMOS DS26LV32AT features typical
low static I
CC
of 9 mA which makes it ideal for battery pow-
ered and power conscious applications. The TRI-STATE
廬
enables, EN and EN*, allow the device to be active High or
active Low. The enables are common to all four receivers.
The receiver output (RO) is guaranteed to be High when the
inputs are left open. The receiver can detect signals as low
as
鹵
200 mV over the common mode range of
鹵
10V. The re-
ceiver outputs (RO) are compatible with TTL and LVCMOS
levels.
Features
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Low Power CMOS design (30 mW typical)
Interoperable with existing 5V RS-422 networks
Industrial and Military Temperature Range
Conforms to TIA/EIA-422-B (RS-422) and ITU-T V.11
Recommendation
3.3V Operation
鹵
7V Common Mode Range
@
V
ID
= 3V
鹵
10V Common Mode Range
@
V
ID
= 0.2V
Receiver OPEN input failsafe feature
Guaranteed AC Parameter:
Maximum Receiver Skew: 4 ns
Maximum Transition Time: 10 ns
Pin compatible with DS26C32AT
32 MHz Toggle Frequency
>
6.5k ESD Tolerance (HBM)
Available in SOIC and Cerpack Packaging
Standard Microcircuit Drawing (SMD) 5962-98585
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Connection Diagram
Dual-In-Line Package
Truth Table
Enables
EN
L
All Other
Combinations of
Enable Inputs
鈥?/div>
Open, not terminated
L = Logic Low
H = Logic High
X = Irrelevant
Z = TRI-STATE
Inputs
EN*
H
RI+鈥揜I鈭?/div>
X
V
ID
鈮?/div>
+0.2V
V
ID
鈮?/div>
鈭?.2V
Open
鈥?/div>
Output
RO
Z
H
L
H
DS012908-1
Top View
Order Number DS26LV32ATM or DS26LV32AW
See NS Package Number M16A or W16A
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1999 National Semiconductor Corporation
DS012908
www.national.com
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