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DS26C32AM Datasheet

  • DS26C32AM

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DS26C32AT/DS26C32AM Quad Differential Line Receiver
June 1998
DS26C32AT/DS26C32AM
Quad Differential Line Receiver
General Description
The DS26C32A is a quad differential line receiver designed
to meet the RS-422, RS-423, and Federal Standards 1020
and 1030 for balanced and unbalanced digital data transmis-
sion, while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the
common mode input voltage range of
鹵
7V. The DS26C32A
features internal pull-up and pull-down resistors which pre-
vent output oscillation on unused channels.
The DS26C32A provides an enable and disable function
common to all four receivers, and features TRI-STATE
廬
out-
puts with 6 mA source and sink capability. This product is pin
compatible with the DS26LS32A and the AM26LS32.
Features
n
CMOS design for low power
n
鹵
0.2V sensitivity over input common mode voltage
range
n
Typical propagation delays: 19 ns
n
Typical input hysteresis: 60 mV
n
Inputs won鈥檛 load line when V
CC
= 0V
n
Meets the requirements of EIA standard RS-422
n
TRI-STATE outputs for connection to system buses
n
Available in Surface Mount
n
Mil-Std-883C compliant
Logic Diagram
DS008764-1
Connection Diagrams
Dual-In-Line Package
20-Lead Ceramic Leadless Chip Carrier
DS008764-2
Top View
Order Number DS26C32ATM or DS26C32ATN
See NS Package M16A or N16E
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
Order Number DS26C32AME/883, DS26C32AMJ/883 or
DS26C32AMW/883
See NS Package E20A, J16A or W16A
DS008764-12
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS008764
www.national.com

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