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DS25C400TUT Datasheet

  • DS25C400TUT

  • Quad 2.5 Gbps Serializer/Deserializer

  • 26頁

  • NSC

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DS25C400 Quad 2.5 Gbps Serializer/Deserializer
PRELIMINARY
September 2002
DS25C400
Quad 2.5 Gbps Serializer/Deserializer
General Description
The DS25C400 is a four-channel serializer/deserializer
(SERDES) for high-speed serial data transmission over con-
trolled impedance transmission media such as a printed
circuit board backplane or twin-axial cable. It is capable of
transmitting and receiving serial data of 2.125 - 2.5 Gbps or
1.0625 - 1.25 Gbps per channel.
Each transmit section of the DS25C400 contains a low-jitter
clock synthesizer, an 8-bit or 10-bit parallel to serial con-
verter with built in 8b/10b encoder, and a CML output driver
with selectable pre-emphasis optimized for backplane appli-
cations. Its receive section contains an input limiting ampli-
fier with on-chip terminations and selectable equalization
levels, a clock/data recovery PLL, a comma detector and a
serial to parallel converter with built-in 8b/10b decoder.
The DS25C400 has built-in local loopback test mode,
pseudo-random pattern generator and error detector to sup-
port self-testing.
The DS25C400 requires no external components for its
clock synthesizers and clock recovery PLL鈥檚. Three external
resistors are needed to set the proper bias currents and
compensate for process variations to achieve tight tolerance
on-chip terminations.
Features
n
Quad Serializer/Deserializer
n
Data rate per channel: 2.125 - 2.5 Gbps or 1.0625 -
1.25 Gbps
n
Supports 106.25 - 125 MHz differential reference input
clock
n
Low jitter clock synthesizers for clock distribution
n
8-bit or 10-bit parallel I/O Interface conforms to
SSTL_18 Class 1 (also interfaces to 1.8V HSTL or 1.8V
LVCMOS)
n
On-chip 8b/10b encoder and decoder
n
High speed serial CML drivers
n
High speed serial CML on-chip terminations
n
Selectable pre-emphasis and equalization
n
On-chip Comma Detect for character alignment
n
On-chip local loopback test mode
n
On-chip pattern generator and error checker to support
BIST
n
Hot plug protection
n
Low power, 420 mW (typ) per channel
n
324-ball TE-PBGA package
n
Operating temperature 鈭?0藲C to +85藲C
General Function Diagram
20030101
漏 2002 National Semiconductor Corporation
DS200301
www.national.com

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