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Large counters for bipolar and code
violations, CRC4 code word errors, FAS
word errors, and E-bits
Programmable output clocks for Fractional
E1, per channel loopback, H0 and H12
applications
Integral HDLC controller with 64-byte
buffers. Configurable for Sa bits or DS0
operation
Detects and generates AIS, remote alarm,
and remote multiframe alarms
IEEE 1149.1 support
DESCRIPTION
The DS21FT40 MCM offers a high density packaging arrangement for the DS21Q44 E1 Enhanced Quad
Framer. Three DS21Q44 silicon die are packaged in a Multi-Chip Module (MCM) with the electrical
connections as shown in Figure 1-1. The DS21FT40 is closely related to the DS21FT44. Most of the
functions of the DS21FT44 are available on the DS21FT40. The differences are listed in Table 1-1.
Table 2-1 lists all of the signals on the MCM.
The DS21Q44 E1 Framer is an enhanced version of the DS21Q43 Quad E1 Framer. Each DS21Q44 die
contains four framers that are configured and read through a common microprocessor-compatible parallel
port. Each framer consists of a receive framer, receive elastic store, transmit formatter and transmit
elastic store. All four framers in the DS21Q44 are totally independent, they do not share a common
framing synchronizer. Also, the transmit and receive sides of each framer are totally independent. The
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