DS2176
T1 Receive Buffer
www.dalsemi.com
FEATURES
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PIN ASSIGNMENT
SIGH
RMSYN
RCLK
RSER
A
B
C
D
SCHCLK
SM0
SM1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
SCKLSEL
SYCLK
SSER
SLIP
SBIT8
SMSYNC
SIGFRZ
SFSYNC
ALN
FMS
S/P
Synchronizes loop鈥搕imed and system鈥搕imed
T1 data streams
Two鈥揻rame buffer depth; slips occur on frame
boundaries
Output indicates when slip occurs
Buffer may be recentered externally
Ideal for 1.544 to 2.048 MHz rate conversion
Interfaces to parallel or serial backplanes
Extracts and buffers robbed鈥揵it signaling
Inhibits signaling updates during alarm or slip
conditions
Integration feature 鈥渄ebounces鈥?signaling
Slip鈥揷ompensated output indicates when
signaling updates occur
Compatible with DS2180A T1 Transceiver
Surface mount package available, designated
DS2176Q
Industrial temperature range of 鈥?0擄C to
+85擄C available, designated DS2176N
24-PIN 300 MIL DIP
A
B
NC
NC
C
D
SCHCLK
RSER
RCLK
RMSYNC
SIGH
VDD
SCKLSEL
SYSCLK
4
5
6
7
8
9
10
11
12
13 14
15
16
17
18
3
2
1
28
27
26
25
24
23
22
21
20
19
SSER
SLIP
SBIT8
NC
NC
SMSYNC
SIGFRZ
DESCRIPTION
The DS2176 is a low鈥損ower CMOS device specifically designed for synchronizing receive side loop鈥?/div>
timed T鈥揷arrier data streams with system side timing. The device has several flexible operating modes
which simplify interfacing incoming data to parallel and serial TDM backplanes. The device extracts,
buffers and integrates ABCD signaling; signaling updates are prohibited during alarm or slip conditions.
The buffer replaces extensive hardware in existing applications with one 鈥渟kinny鈥?24鈥搇ead package.
Application areas include digital trunks, drop and insert equipment, transcoders, digital cross鈥揷onnects
(DACS), private network equipment and PABX鈥搕o鈥揷omputer interfaces such as DMI and CPI.
1 of 15
091599
SM0
SM1
VSS
S/P
FMS
ALN
SFSYNC
28-PIN PLCC
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