DS2164Q
G.726 ADPCM Processor
www.maxim-ic.com
FEATURES
摟
摟
Compresses/expands 64kbps PCM voice
to/from either 32kbps, 24kbps, or 16kbps
Dual fully independent channel architecture;
device can be programmed to perform either:
-
two expansions
-
two compressions
-
one expansion and one compression
Interconnects directly to combo-codec
devices
Input to output delay is less than 375ms
Simple serial port used to configure the
device
On-board time-slot assigner-circuit (TSAC)
function allows data to be input/output at
various time slots
Supports Channel Associated Signaling
Each channel can be independently idled or
placed into bypass
Available hardware mode requires no host
processor; ideal for voice storage
applications
Backward-compatible with the DS2165Q
ADPCM processor chip
Single +5V supply; low-power CMOS
technology
Available in 28-pin PLCC
PIN ASSIGNMENT (Top View)
TM1
TM0
RST
NC
VDD
YIN
CLKY
NC
A0
A1
A2
A3
A4
A5
5
6
7
8
9
10
11
12
13 14
15
16
17
18
4
3
2
1
28
27
26
25
24
23
DS2164Q
22
21
20
19
摟
摟
摟
摟
摟
摟
摟
摟
摟
摟
FSY
YOUT
CS
SDI
SCLK
XOUT
NC
DESCRIPTION
The DS2164Q ADPCM processor chip is a dedicated digital-signal-processing (DSP) chip that has been
optimized to perform adaptive-differential pulse-code modulation (ADPCM) speech compression at three
different rates. The chip can be programmed to compress (expand) 64kbps voice data down to (up from)
either 32kbps, 24kbps, or 16kbps. The compression to 32kbps follows the algorithm specified by CCITT
Recommendation G.726. The DS2164Q can switch compression algorithms on-the-fly. This allows the
user to make maximum use of the available bandwidth on a dynamic basis.
Note:
Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple
revisions of any device may be simultaneously available through various sales channels. For information about device errata,
click here:
http://www.maxim-ic.com/errata.
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070802
SPS
MCLK
VSS
NC
XIN
CLKX
FSX
28-Pin PLCC