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DS1642-120 Datasheet

  • DS1642-120

  • IC-16K CMOS NVRAM

  • 10頁(yè)

  • ETC

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DS1642
DS1642
Nonvolatile Timekeeping RAM
FEATURES
PIN ASSIGNMENT
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A8
A9
WE
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
鈥?/div>
Form, fit, and function compatible with the MK48T02
Timekeeping RAM
鈥?/div>
Integrated NV SRAM, real time clock, crystal, power
fail control circuit and lithium energy source
鈥?/div>
Standard JEDEC bytewide 2K x 8 static RAM pinout
鈥?/div>
Clock
registers are accessed identical to the static
RAM. These registers are resident in the eight top
RAM locations.
the absence of power
鈥?/div>
Totally nonvolatile with over 10 years of operation in
鈥?/div>
Access times of 120 ns and 150 ns
鈥?/div>
Quartz accuracy
鹵1
minute a month @ 25擄C, factory
calibrated
鈥?/div>
BCD coded year, month, date, day, hours, minutes,
and seconds with leap year compensation valid up to
2100
PIN DESCRIPTION
A0鈥揂10
CE
OE
WE
V
CC
GND
DQ0鈥揇Q7
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Address Input
Chip Enable
Output Enable
Write Enable
+5 Volts
Ground
Data Input/Output
鈥?/div>
Power fail write protection allows for
鹵10%
V
CC
power
supply tolerance
DESCRIPTION
The DS1642 is an 2K x 8 nonvolatile static RAM with a
full function real time clock which are both accessible in
a bytewide format. The nonvolatile time keeping RAM is
pin and function equivalent to any JEDEC standard
2K x 8 SRAM. The device can also be easily substituted
in ROM, EPROM and EEPROM sockets providing read/
write nonvolatility and the addition of the real time clock
function. The real time clock information resides in the
eight uppermost RAM locations. The RTC registers
contain year, month, date, day, hours, minutes, and se-
conds data in 24 hour BCD format. Corrections for the
day of the month and leap year are made automatically.
The RTC clock registers are double buffered to avoid
access of incorrect data that can occur during clock up-
date cycles. The double buffered system also prevents
time loss as the timekeeping countdown continues un-
abated by access to time register data. The DS1642
also contains its own power fail circuitry which deselects
the device when the V
CC
supply is in an out of tolerance
condition. This feature prevents loss of data from un-
predictable system operation brought on by low V
CC
as
errant access and update cycles are avoided.
ECopyright
1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
041697 1/10

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