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DS14C89A Datasheet

  • DS14C89A

  • Quad CMOS Receiver

  • 5頁

  • NSC

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DS14C89A Quad CMOS Receiver
May 1998
DS14C89A
Quad CMOS Receiver
General Description
The DS14C89A, pin-for-pin compatible to the DS1489A/
MC1489A, ia a quad receiver designed to interface data
terminal equipment (DTE) with data circuit-terminating
equipment (DCE). These devices translate levels conform-
ing to EIA-232E and CCITT V.28 standards to TTL/CMOS
logic levels.
The device is fabricated in low threshold CMOS metal gate
technology. The device provides very low power consump-
tion compared to their bipolar equivalents: 900 碌A
(DS14C89A) versus 26 mA (DS1489A).
The DS14C89A provides on chip noise filtering which elimi-
nates the need for external response control filter capacitors.
When replacing the DS1489A with the DS14C89A, the re-
sponse control filter pins can be tied high, low, or not con-
nected.
Features
n
n
n
n
n
Meets EIA/TIA-232-E and CCITT V.28 Standards
Failsafe - Output High for Open Input
LOW Power consumption
On chip noise filter
Available in SOIC Package
Connection Diagram
01110601
Order Number DS14C89AN, DS14C89AM,
See NS Package Number M14A, N14A
漏 2004 National Semiconductor Corporation
DS011106
www.national.com

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