DP83848H PHYTER廬 Mini - Extreme Single 10/100 Ethernet Transceiver
October 2007
DP83848H PHYTER Mini - Extreme Single 10/100 Ethernet
Transceiver
General Description
The DP83848H PHYTER廬 Mini Extreme addresses the
high quality, high reliability and small form factor required
for rugged operation in space sensitive and thermally
demanding environments. This device is ideally suited for
industrial and motor control, building/factory automation,
automotive and test equipment applications.
廬
Features
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Low-power 3.3V, 0.18碌m CMOS technology
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Auto-MDIX for 10/100 Mb/s
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Energy Detection Mode
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3.3V MAC Interface
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RMII Rev. 1.2 Interface (configurable)
The DP83848H is designed from ground up for extreme
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MII Interface and MII serial management interface (MDC
and MDIO)
temperature performance, with a thermally efficient pack-
age ensuring reliable operation over an operating range of
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IEEE 802.3u Auto-Negotiation and Parallel Detection
-40C to 125C. Rigorously tested at both low temperature
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IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
and high temperature extremes, the device is ideal for out-
door environments and demanding factory floor conditions.
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IEEE 802.3u PCS, 100BASE-TX transceivers and filters
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Integrated ANSI X3.263 compliant TP-PMD physical sub-
The device offers performance beyond the IEEE specifica-
layer with adaptive equalization and Baseline Wander
tions, with superior interoperability and industry leading
compensation
performance. The DP83848H offers Auto-MDIX to remove
cabling complications, superior ESD protection of greater
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Error-free Operation up to 137 meters
than 4KV HBM for greater reliability, and superior cable
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ESD protection - 4KV Human body model
length operation (greater than 137m) to provide a high
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Configurable LED for link and activity
level of performance in all applications.
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Supports system clock from oscillator
A number of system cost-reducing features have been
integrated that are not commonly found in other Ethernet
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Single register access for complete PHY status
Physical layer products (PHYs). For example, the
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10/100 Mb/s packet BIST (Built in Self Test)
DP83848H offers a 25MHz clock out that eliminates the
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40 pin LLP package (6mm) x (6mm) x (0.8mm)
need and hence the space and cost, of an additional
Media Access Control (MAC) clock source component. In
Applications
addition, both MII and RMII are supported ensuring ease
and flexibility of design.
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Peripheral devices
DP83848H is offered in a small 6mm x 6mm LLP 40-pin
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Mobile devices
package.
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Factory and building automation
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Basestations
System Diagram
Media Access Controller
MPU/CPU
MII/RMII
10/100 Ethernet
Transceiver
Clock
Source
Status
LED
Typical Ethernet Application
PHYTER
廬
is a registered trademark of National Semiconductor Corporation.
RJ-45
DP83848H
Magnetics
10BASE-T
or
100BASE-TX
漏
2007 National Semiconductor Corporation
www.national.com
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