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DP83848C_07 Datasheet

  • DP83848C_07

  • PHYTER㈢ - Commercial Temperature Single Port 10/100 Mb/s Et...

  • 82頁

  • NSC

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DP83848C PHYTER
廬
鈥?Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
Febuary 2007
DP83848C PHYTER - Commercial Temperature
Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
General Description
The DP83848C is a robust fully featured 10/100 single
port Physical Layer device offering low power con-
sumption, including several intelligent power down
states. These low power modes increase overall prod-
uct reliability due to decreased power dissipation. Sup-
porting multiple intelligent power modes allows the
application to use the absolute minimum amount of
power needed for operation.
The DP83848C includes a 25MHz clock out. This
means that the application can be designed with a
minimum of external parts, which in turn results in the
lowest possible total cost of the solution.
The DP83848C easily interfaces to twisted pair media
via an external transformer. Both MII and RMII are
supported ensuring ease and flexibility of design.
The DP83848C features integrated sublayers to sup-
port both 10BASE-T and 100BASE-TX Ethernet proto-
cols, which ensures compatibility and interoperability
with all other standards based Ethernet solutions.
The DP83848C is offered in a small form factor (48 pin
LQFP) so that a minimum of board space is needed.
廬
Features
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Low-power 3.3V, 0.18碌m CMOS technology
Low power consumption < 270mW Typical
3.3V MAC Interface
Auto-MDIX for 10/100 Mb/s
Energy Detection Mode
25 MHz clock out
SNI Interface (configurable)
RMII Rev. 1.2 Interface (configurable)
MII Serial Management Interface (MDC and MDIO)
IEEE 802.3u MII
IEEE 802.3u Auto-Negotiation and Parallel Detection
IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
IEEE 802.3u PCS, 100BASE-TX transceivers and filters
Integrated ANSI X3.263 compliant TP-PMD physical sub-
layer with adaptive equalization and Baseline Wander com-
pensation
Error-free Operation up to 137 meters
Programmable LED support Link, 10 /100 Mb/s Mode, Activ-
ity, and Collision Detect
Single register access for complete PHY status
10/100 Mb/s packet BIST (Built in Self Test)
48-pin LQFP package (7mm) x (7mm)
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Applications
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High End Peripheral Devices
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Industrial Controls and Factory Automation
鈥?/div>
General Embedded Applications
System Diagram
Media Access Controller
Magnetics
MPU/CPU
DP83848C
MII/RMII/SNI
RJ-45
10BASE-T
or
100BASE-TX
10/100 Mb/s
25 MHz
Clock
Source
Status
LEDs
Typical Application
PHYTER
廬
is a registered trademark of National Semiconductor.
漏
2007 National Semiconductor Corporation
1
www.national.com

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