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DP83231 Datasheet

  • DP83231

  • 16頁

  • ETC

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DP83231 CRD Device (FDDI Clock Recovery Device)
February 1991
DP83231 CRD
TM
Device
(FDDI Clock Recovery Device)
General Description
The DP83231 CRD device is a clock recovery device that
has been designed for use in 100 Mbps FDDI (Fiber Distrib-
uted Data Interface) networks The device receives serial
data from a Fiber Optic Receiver in differential ECL NRZI
4B 5B group code format and outputs resynchronized NRZI
received data and a 125 MHz received clock in differential
ECL format for use by the DP83251 55 PLAYER
TM
device
Features
Y
Y
Y
Y
Y
Y
Clock recovery at 100 Mbps data rate
Internal 250 MHz VCO
0 1% VCO operating range
Crystal controlled
Precision window centering delay line
Single
a
5V supply
28-pin PLCC package
BiCMOS processing
TL F 10384 鈥?1
FIGURE 1-1 FDDI Chip Set Block Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
BSI
TM
BMAC
TM
PLAYER
TM
CDD
TM
and CRD
TM
are trademarks of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 10384
RRD-B30M105 Printed in U S A

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