Microcontroller
Controlling FPGA Configuration with a
Flash-Based Microcontroller
Introduction
SRAM-based FPGAs like the Atmel
AT6000 series come more and more
into use because of the many advan-
tages they offer. Their reconfigurability
allows the user to implement more gates
in his application than the FPGA actually
has, simply by loading the gates as
needed into the FPGA. This is also
called 鈥淐ache Logic鈩?.鈥?For an efficient
use of cache logic, the FPGA must meet
the following requirements: partial re-
configurability, a fast reconfiguration
process and full architectural symmetry.
The FPGA can control and change its
configuration itself, but this can also be
done in a very elegant way by a micro-
controller. After the configuration proc-
ess or in-between two configuration cy-
cles it can be used for other purposes
and is not lost for the application. The
different options for space-saving reali-
zation, design protection or for fast, flex-
Figure 1.
Bitstream Structure
ible reconfiguration are shown in this ap-
plication note. The microcontroller used
here is the Atmel AT89C51 which is fully
compatible to the industry standard
i8031.
8-Bit
Microcontroller
with Flash
Application
Note
Configuration Data Transfer
between the FPGA and the
Microcontroller
The amount of information that makes
up the configuration information for the
FPGA is called a bitstream. It is a file
stored somewhere in a memory section.
Figure 1 shows how this bitstream is
structured:
The bitstream begins with a token, the
preamble, which indicates the beginning
of the header section that contains
global information concerning the whole
configuration cycle. This is followed by
the configuration information for the
core cells and by the I/O configuration.
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