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DM74S244N Datasheet

  • DM74S244N

  • Octal 3-STATE Buffer/Line Driver/Line Receiver

  • 4頁

  • FAIRCHILD

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DM74S240 鈥?DM74S241 鈥?DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver
August 1986
Revised May 2000
DM74S240 鈥?DM74S241 鈥?DM74S244
Octal 3-STATE Buffer/Line Driver/Line Receiver
General Description
These buffers/line drivers are designed to improve both the
performance and PC board density of 3-STATE buffers/
drivers employed as memory-address drivers, clock driv-
ers, and bus-oriented transmitters/receivers. Featuring 400
mV of hysteresis at each low current PNP data line input,
they provide improved noise rejection and high fanout out-
puts, and can be used to drive terminated lines down to
133鈩?
Features
s
3-STATE outputs drive bus lines directly
s
PNP inputs reduce DC loading on bus lines
s
Hysteresis at data inputs improves noise margins
s
Typical I
OL
(sink current)
s
Typical I
OH
(source current)
Inverting
Noninverting
4.5 ns
6 ns
64 mA
鈭?5
mA
s
Typical propagation delay times
s
Typical enable/disable times 9 ns
s
Typical power dissipation (enabled)
Inverting
Noninverting
450 mW
538 mW
Ordering Code:
Order Number
DM74S240N
DM74S241N
DM74S244N
Package Number
N20A
N20A
N20A
Package Description
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagrams
DM74S240N
DM74S241N
DM74S244N
漏 2000 Fairchild Semiconductor Corporation
DS006478
www.fairchildsemi.com

DM74S244N 產(chǎn)品屬性

  • Fairchild Semiconductor

  • 8

  • 8

  • Non-Inverting

  • 5.25 V

  • 4.75 V

  • + 70 C

  • Through Hole

  • DIP-20

  • Rail

  • - 15 mA

  • S

  • Bipolar

  • 64 mA

  • 450 mW

  • 0 C

  • 8

  • 3-State

  • 12 ns at 5 V

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