DM54LS491 74LS491 10-Bit Counter
July 1989
DM54LS491 74LS491 10-Bit Counter
General Description
The ten-bit counter can count up count down set and load
2 LSB鈥檚 2 MSB鈥檚 and 6 middle bits high or low as a group
All operations are synchronous with the clock SET over-
rides LOAD COUNT and HOLD LOAD overrides COUNT
COUNT is conditional on C
IN
otherwise it holds
All outputs are enabled when OE is low otherwise HIGH-Z
The 24 mA I
OL
outputs are suitable for driving RAM PROM
address lines in video graphics systems
Features Benefits
Y
Y
Y
Y
Y
CRT vertical and horizontal timing generation
Bus-structured pinout
24-pin SKINNYDIP saves space
TRI-STATE outputs drive bus lines
Low current PNP inputs reduce loading
Connection Diagram
Top View
Standard Test Load
TL L 8332 鈥?
TL L 8332 鈥?
Order Number DM54LS491J
DM74LS491J or DM74LS491N
See NS Package Number J24F or N24C
Function Table
OE CK SET LD CNT C
IN
UP D9-D0
H
L
L
L
L
L
L
X
Q9-Q0
Operation
X
H
L
L
L
L
L
X
X
L
H
H
H
H
X
X
X
H
L
L
L
X
X
X
X
H
L
L
X
X
X
X
X
L
H
X
X
D
X
X
X
X
Z
Hi-Z
H
Set all HIGH
D
LOAD D
Q
HOLD
Q
HOLD
Q plus 1 Count UP
Q minus 1 Count DN
u
u
u
u
u
u
TRI-STATE is a registered trademark of National Semiconductor Corp
C
1995 National Semiconductor Corporation
TL L 8332
RRD-B30M115 Printed in U S A
1
2
3
4
