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DM54LS450 DM74LS450 16 1 Multiplexer

PRELIMINARY

July 1989

DM54LS450 DM74LS450 16 1 Multiplexer

General Description

The 16 1 Mux selects one of sixteen inputs E0 through E15

specified by four binary select inputs A B C and D The

true data is output on Y and the inverted data on W Propa-

gation delays are the same for both inputs and addresses

and are specified for 50 pF loading Outputs conform to the

standard 8 mA LS totem pole drive standard

Features Benefits

Y

Y

Y

24-pin SKINNYDIP saves space

Similar to 74150 (Fat DIP)

Low current PNP inputs reduce loading

Connection Diagram

Top View

Standard Test Load

TL L 8338 鈥?2

TL L 8338 鈥?

Order Number DM54LS450J DM74LS450J

DM74LS450N or DM74LS450V

See NS Package Number J24F N24C or V28A

Function Table

Input

Select

D

L

L

L

L

L

L

L

L

H

H

H

H

H

H

H

H

C

1995 National Semiconductor Corporation

TL L 8338

Output

B

L

L

H

H

L

L

H

H

L

L

H

H

L

L

H

H

A

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

W

E0

E1

E2

E3

E4

E5

E6

E7

E8

E9

E10

E11

E12

E13

E14

E15

Y

E0

E1

E2

E3

E4

E5

E6

E7

E8

E9

E10

E11

E12

E13

E14

E15

RRD-B30M115 Printed in U S A

C

L

L

L

L

H

H

H

H

L

L

L

L

H

H

H

H

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