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DM74LS365AN Datasheet

  • DM74LS365AN

  • Hex TRI-STATE Buffers

  • 6頁(yè)

  • NSC

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54LS365A DM54LS365A DM74LS365A Hex TRI-STATE Buffers
June 1989
54LS365A DM54LS365A DM74LS365A
Hex TRI-STATE Buffers
General Description
This device contains six independent gates each of which
performs a non-inverting buffer function The outputs have
the TRI-STATE feature When enabled the outputs exhibit
the low impedance characteristics of a standard LS output
with additional drive capability to permit the driving of bus
lines without external resistors When disabled both the
output transistors are turned off presenting a high-imped-
ance state to the bus line Thus the output will act neither as
a significant load nor as a driver To minimize the possibility
that two outputs will attempt to take a common bus to oppo-
site logic levels the disable time is shorter than the enable
time of the outputs
Features
Y
Alternate Military Aerospace device (54LS365A) is
available Contact a National Semiconductor Sales Of-
fice Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6427 鈥?1
Order Number 54LS365ADMQB 54LS365AFMQB 54LS365ALMQB
DM54LS365AJ DM54LS365AW DM74LS265AM or DM74LS365AN
See NS Package Number E20A J16A M16A N16E or W16A
Function Table
Y
e
A
Input
G1
H
X
L
L
G2
X
H
L
L
A
X
X
H
L
Output
Y
Hi-Z
Hi-Z
H
L
H
e
High Logic Level
L
e
Low Logic Level
X
e
Either Low or High Logic Level
Hi-Z
e
TRI-STATE (Outputs are disabled)
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 6427
RRD-B30M105 Printed in U S A

DM74LS365AN 產(chǎn)品屬性

  • 25

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74LS

  • 緩沖器/線路驅(qū)動(dòng)器，非反相

  • 6

  • 1

  • 2.6mA，24mA

  • 4.75 V ~ 5.25 V

  • 0°C ~ 70°C

  • 通孔

  • 16-DIP（0.300"，7.62mm）

  • 16-DIP

  • 管件

  • 74LS36574LS365AN74LS365NDM74LS365N

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