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DM74LS365AN Datasheet

  • DM74LS365AN

  • Hex 3-STATE Buffer/Bus Driver

  • FAIRCHILD

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DM74LS365A Hex 3-STATE Buffer/Bus Driver
August 1986
Revised March 2000
DM74LS365A
Hex 3-STATE Buffer/Bus Driver
General Description
This device contains six independent gates each of which
performs a non-inverting buffer function. The outputs have
the 3-STATE feature. When enabled, the outputs exhibit
the low impedance characteristics of a standard LS output
with additional drive capability to permit the driving of bus
lines without external resistors. When disabled, both the
output transistors are turned OFF presenting a high-imped-
ance state to the bus line. Thus the output will act neither
as a significant load nor as a driver. To minimize the possi-
bility that two outputs will attempt to take a common bus to
opposite logic levels, the disable time is shorter than the
enable time of the outputs.
Ordering Code:
Order Number
DM74LS365AM
DM74LS365AN
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Function Table
Y
=
A
Input
G1
H
X
L
L
G2
X
H
L
L
A
X
X
H
L
Output
Y
Hi-Z
Hi-Z
H
L
H
=
HIGH Logic Level
L
=
LOW Logic Level
X
=
Either LOW or HIGH Logic Level
Hi-Z
=
3-STATE (Outputs are disabled)
漏 2000 Fairchild Semiconductor Corporation
DS006427
www.fairchildsemi.com

DM74LS365AN 產(chǎn)品屬性

  • 25

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74LS

  • 緩沖器/線路驅(qū)動(dòng)器，非反相

  • 6

  • 1

  • 2.6mA，24mA

  • 4.75 V ~ 5.25 V

  • 0°C ~ 70°C

  • 通孔

  • 16-DIP（0.300"，7.62mm）

  • 16-DIP

  • 管件

  • 74LS36574LS365AN74LS365NDM74LS365N

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