54LS352 DM74LS352 Dual 4-Line to 1-Line Data Selectors Multiplexers
June 1989
54LS352 DM74LS352 Dual 4-Line to
1-Line Data Selectors Multiplexers
General Description
Each of these data selectors multiplexers contains invert-
ers and drivers to supply fully complementary on-chip bi-
nary decoding data selection to the AND-OR-invert gates
Separate strobe inputs are provided for each of the two
four-line sections
Y
Y
Y
Y
Features
Y
Y
Inverting version of DM54 74LS153
Permits multiplexing from N lines to 1 line
Y
Performs parallel-to-serial conversion
Strobe (enable) line provided for cascading (N lines to
n lines)
High fan-out low-impedance totem-pole outputs
Typical average propagation delay times
From data 15 ns
From strobe 19 ns
From select 22 ns
Typical power dissipation 31 mW
Connection Diagram
Dual-In-Line Package
Function Table
Select
Inputs
B
X
L
L
L
L
H
H
H
H
A
X
L
L
H
H
L
L
H
H
C0
X
L
H
X
X
X
X
X
X
Data Inputs
C1
X
X
X
L
H
X
X
X
X
C2
X
X
X
X
X
L
H
X
X
C3
X
X
X
X
X
X
X
L
H
Strobe
G
H
L
L
L
L
L
L
L
L
Output
Y
H
H
L
H
L
H
L
H
L
Select inputs A and B are common to both sections
H
e
High Level L
e
Low Level X
e
Don鈥檛 Care
TL F 6425 鈥?1
Order Number 54LS352DMQB 54LS352FMQB
DM74LS352M or DM74LS352N
See NS Package Number J16A M16A N16E or W16A
C
1995 National Semiconductor Corporation
TL F 6425
RRD-B30M105 Printed in U S A