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DM74LS26N Datasheet

  • DM74LS26N

  • Quad 2-Input NAND Gate with High Voltage Open-Collector Outp...

  • FAIRCHILD

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DM74LS26 Quad 2-Input NAND Gate with High Voltage Open-Collector Outputs
August 1986
Revised March 2000
DM74LS26
Quad 2-Input NAND Gate
with High Voltage Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
These gates feature high-voltage output ratings (up to 15V)
for interfacing with 12V systems. Although the outputs are
rated for 15V, the device supply is still rated for 5V.
Pull-Up Resistor Equations
Where:
N
1
(I
OH
)
=
total maximum output high current
for all outputs tied to pull-up resistor
N
2
(I
IH
)
=
total maximum input high current for
all inputs tied to pull-up resistor
N
3
(I
IL
)
=
total maximum input low current for
all inputs tied to pull-up resistor
Ordering Code:
Order Number
DM74LS26M
DM74LS26N
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Function Table
Y
=
AB
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
B
L
H
L
H
Y
H
H
H
L
漏 2000 Fairchild Semiconductor Corporation
DS006358
www.fairchildsemi.com

DM74LS26N 產(chǎn)品屬性

  • 25

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74LS

  • 與非門

  • 4

  • 2

  • 開路集電極

  • 4.75 V ~ 5.25 V

  • -

  • -，8mA

  • 0.8V

  • 2V

  • 45ns @ 5V，50pF

  • 0°C ~ 70°C

  • 通孔

  • 14-DIP

  • 14-DIP（0.300"，7.62mm）

  • 管件

  • 74LS2674LS26N

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