DM74ALS38A Quadruple 2-Input NAND Buffer with Open-Collector Outputs
September 1986
Revised February 2000
DM74ALS38A
Quadruple 2-Input NAND Buffer
with Open-Collector Outputs
General Description
This device contains four independent gates, each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Functionally and pin for pin compatible with LS TTL
counterpart
s
Improved AC performance over LS38
s
Improved line receiving characteristics
Where:
N
1
(I
OH
)
=
total maximum output HIGH current
for all outputs tied to pull-up resistor
N
2
(I
IH
)
=
total maximum input HIGH current
for all inputs tied to pull-up resistor
N
3
(I
IL
)
=
total maximum input LOW current for
all inputs tied to pull-up resistor
Ordering Code:
Order Number
DM74ALS38AM
DM74ALS38AN
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Function Table
Y
=
AB
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
B
L
H
L
H
Y
H
H
H
L
漏 2000 Fairchild Semiconductor Corporation
DS006193
www.fairchildsemi.com
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