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DM74180 Datasheet

  • DM74180

  • 9-Bit Parity Generators/Checkers

  • 6頁

  • NSC

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DM54180 DM74180 9-Bit Parity Generators Checkers
June 1989
DM54180 DM74180 9-Bit Parity Generators Checkers
General Description
These universal 9-bit (8 data bits plus 1 parity bit) parity
generators checkers feature odd even outputs and control
inputs to facilitate operation in either odd or even parity ap-
plications Depending on whether even or odd parity is be-
ing generated or checked the even or odd input can be
utilized as the parity or 9th-bit input The word-length capa-
bility is easily expanded by cascading
Input buffers are provided so that each data input repre-
sents only one normalized series 54 74 load A full fan-out
to 10 normalized series 54 74 loads is available from each
of the outputs at a low logic level A fan-out to 20 normal-
ized loads is provided at a high logic level to facilitate the
connection of unused inputs to used inputs
Connection Diagram
Dual-In-Line Package
TL F 6559 鈥?1
Order Number DM54180J DM54180W or DM74180N
See NS Package Number J14A N14A or W14B
Function Table
Inputs
R
of H鈥檚 at
A thru H
Even
Odd
Even
Odd
X
X
Even
H
H
L
L
H
L
Odd
L
L
H
H
H
L
Outputs
R
Even
H
L
L
H
L
H
R
Odd
L
H
H
L
L
H
H
e
High Level L
e
Low Level X
e
Don鈥檛 Care
C
1995 National Semiconductor Corporation
TL F 6559
RRD-B30M105 Printed in U S A

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