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DM54367W Datasheet

  • DM54367W

  • Hex TRI-STATE Buffers

  • 97.29KB

  • 4頁

  • NSC

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DM54367 Hex TRI-STATE Buffers
June 1989
DM54367 Hex TRI-STATE Buffers
General Description
This device contains six independent gates each of which
performs a non-inverting buffer function The outputs have
the TRI-STATE feature When enabled the outputs exhibit
the low impedance characteristics of a standard TTL output
with additional drive capability to permit the driving of bus
lines without external resistors When disabled both the
output transistors are turned off presenting a high-imped-
ance state to the bus line Thus the output will act neither as
a signficant load nor as a driver To minimize the possibility
that two outputs will attempt to take a common bus to oppo-
site logic levels the disable time is shorter than the enable
time of the outputs
Connection Diagram
Dual-In-Line Package
TL F 6572 鈥?1
Order Number DM54367J or DM54367W
See NS Package Number J16A or W16A
Function Table
Y
e
A
Input
G
L
L
H
A
L
H
X
Output
Y
L
H
Hi-Z
H
e
High Logic Level
L
e
Low Logic Level
X
e
Either Low or High Logic Level
Hi-Z
e
TRI-STATE (Outputs are disabled)
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 6572
RRD-B30M105 Printed in U S A

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