鈥?/div>
4.5V鈥?.5V operation
CMOS SRAM for optimum speed and power
Low active power (165 mW max.)
Low standby power (L Version)鈥?110
碌W
max)
2V data retention (L Version)
JEDEC-compatible pinout
32-pin, 0.6-inch-wide DIP package
TTL-compatible inputs and outputs
an automatic power-down feature that reduces power con-
sumption by more than 99% when deselected.
Writing to the SRAM is accomplished when the chip select
(CS) and write enable (WE) inputs are both LOW. Data on the
eight input/output pins (I/O
0
through I/O
7
) of the device is then
written into the memory location specified on the address pins
(A
0
through A
18
). Reading from the device is accomplished by
taking chip select (CE) and output enable (OE) LOW while
write enable (WE) remains inactive or HIGH. Under these con-
ditions, the contents of the memory location specified on the
address pins (A
0
through A
18
) will appear on the eight appro-
priate data input/output pins (I/O
0
through I/O
7
).The eight in-
put/output pins (I/O0 through I/O7) are placed in a high imped-
ance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), or during a write operation
(CE LOW, and WE LOW).
The CYM1465A is available in a 32-pin 600-mil wide body
PDIP package.
Functional Description
The CYM1465A is a high-performance CMOS static RAM or-
ganized as 512K words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE), an active LOW
Output Enable (OE), and three-state drivers. This device has
Logic Block Diagram
Pin Configuration
DIP
Top View
A
18
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
GND
1
S
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
I/O
0
INPUT BUFFER
A
0
A
1
A
4
A
5
A
6
A
7
A
12
A
14
A
16
A
17
I/O
1
ROW DECODER
I/O
2
SENSE AMPS
512 x 256 x 8
ARRAY
I/O
3
I/O
4
I/O
5
V
CC
A
15
A
17
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
CE
WE
OE
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
Selection Guide
CYM1465A-70
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (碌A(chǔ))
70
20
20
CYM1465A-85
85
20
20
Cypress Semiconductor Corporation
Document #: 38-05269 Rev. **
A
2
A
3
A
15
A
18
A
13
A
8
A
9
A
11
A
10
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised March 15, 2002
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