音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

CYK512K16SCCA Datasheet

  • CYK512K16SCCA

  • 8-Mbit (512K x 16) Pseudo Static RAM

  • 10頁

  • CYPRESS

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

CYK512K16SCCA
MoBL
廬
8-Mbit (512K x 16) Pseudo Static RAM
Features
鈥?Advanced low-power MoBL
廬
architecture
鈥?High speed: 55 ns, 70 ns
鈥?Wide voltage range: 2.7V to 3.3V
鈥?Typical active current: 2 mA @ f = 1 MHz
鈥?Typical active current: 11 mA @ f = f
MAX
鈥?Low standby power
鈥?Automatic power-down when deselected
Functional Description
[1]
The CYK512K16SCCA is a high-performance CMOS pseudo
static RAM (PSRAM) organized as 512K words by 16 bits that
supports an asynchronous memory interface. This device
features advanced circuit design to provide ultra-low active
current. This is ideal for providing More Battery Life鈩?(MoBL)
in portable applications such as cellular telephones. The
device can be put into standby mode reducing power
consumption dramatically when deselected (CE
1
LOW, CE
2
HIGH or both BHE and BLE are HIGH). The input/output pins
(I/O
0
through I/O
15
) are placed in a high-impedance state
when: deselected (CE
1
HIGH, CE
2
LOW), OE is deasserted
HIGH, or during a write operation (Chip Enabled and Write
Enable WE LOW). Reading from the device is accomplished
by asserting the Chip Enables (CE
1
LOW and CE
2
HIGH) and
Output Enable (OE) LOW while forcing the Write Enable (WE)
HIGH. If Byte Low Enable (BLE) is LOW, then data from the
memory location specified by the address pins will appear on
I/O
0
to I/O
7
. If Byte High Enable (BHE) is LOW, then data from
memory will appear on I/O
8
to I/O
15
. See the Truth Table for a
complete description of read and write modes.
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
512K x 16
RAM Array
SENSE AMPS
I/O
0
鈥揑/O
7
I/O
8
鈥揑/O
15
COLUMN DECODER
BHE
WE
OE
BLE
BHE
BLE
CE
2
CE
1
CE
2
CE
1
Note:
1. For best-practice recommendations, please refer to the Cypress application note 鈥淪ystem Design Guidelines鈥?on http://www.cypress.com.
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
Pow
-
er Down
Circuit
Cypress Semiconductor Corporation
Document #: 38-05425 Rev. *E
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised January 25, 2005

CYK512K16SCCA相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！