CY7C138AV-20JC Datasheet

IC型號：
CY7C138AV-20JC
PDF描述：
3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM
文件大?。?/label>
303.47KB
PDF頁數(shù)：
20頁
芯片廠家：
CYPRESS

閱覽下載糾錯 0

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

25/0251

CY7C138AV/144AV/006AV

CY7C139AV/145AV/016AV

CY7C007AV/017AV

3.3V 4K/8K/16K/32K x 8/9

Dual-Port Static RAM

Features

鈥?True Dual-Ported memory cells which allow simulta-

neous access of the same memory location

鈥?4K/8K/16K/32K x 8 organizations

(CY7C0138AV/144AV/006AV/007AV)

鈥?4K/8K/16K/32K x 9 organizations

(CY7C0139AV/145AV/016AV/017AV)

鈥?0.35-micron CMOS for optimum speed/power

鈥?High-speed access: 20/25 ns

鈥?Low operating power

鈥?Active: I

= 115 mA (typical)

鈥?Standby: I

SB3

= 10

碌A(chǔ)

(typical)

鈥?Fully asynchronous operation

鈥?Automatic power-down

鈥?Expandable data bus to 16/18 bits or more using Master/

Slave chip select when using more than one device

鈥?On-chip arbitration logic

鈥?Semaphores included to permit software handshaking

between ports

鈥?INT flag for port-to-port communication

鈥?Pin select for Master or Slave

鈥?Commercial and Industrial Temperature Ranges

鈥?Available in 68-pin PLCC (all) and 64-pin TQFP

(7C006AV & 7C144AV)

鈥?Pin-compatible and functionally equivalent to

IDT70V05, 70V06, and 70V07.

Logic Block Diagram

R/W

[1]

8/9

[1]

I/O

鈥揑/O

7/8L

I/O

Control

I/O

Control

I/O

鈥揑/O

7/8R

[2]

12鈥?5

鈥揂

11鈥?4L

Address

Decode

12鈥?5

True Dual-Ported

RAM Array

Address

Decode

12鈥?5

[2]

鈥揂

11鈥?4R

[2]

鈥揂

11鈥?4L

R/W

SEM

[3]

Interrupt

Semaphore

Arbitration

鈥揂

11鈥?4R

R/W

SEM

[3]

BUSY

INT

M/S

Notes:

1. I/O

鈥揑/O

for x8 devices; I/O

鈥揑/O

for x9 devices.

2. A

鈥揂

for 4K devices; A

鈥揂

for 8K devices; A

鈥揂

for 16K devices; A

鈥揂

for 32K devices;

3. BUSY is an output in master mode and an input in slave mode.

BUSY

INT

For the most recent information, visit the Cypress web site at www.cypress.com

Cypress Semiconductor Corporation

鈥?3901 North First Street 鈥?San Jose 鈥?CA 95134 鈥?408-943-2600

Document #: 38-06051 Rev. *A

Revised December 27, 2002

型號

版本

描述

廠商

下載
CY7C006

英文版

16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Cypress

CY7C006
CY7C007

英文版

32K x 8/9 Dual-Port Static RAM

Cypress

CY7C007
CY7C008

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS

CY7C008
CY7C008

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS [C...

CY7C008
CY7C009

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS

CY7C009
CY7C009

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS [C...

CY7C009
CY7C016

英文版

16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Cypress

CY7C016
CY7C017

英文版

32K x 8/9 Dual-Port Static RAM

Cypress

CY7C017
CY7C018

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS

CY7C018
CY7C018

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS [C...

CY7C018
CY7C019

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS

CY7C019
CY7C019

英文版

64K/128K x 8/9 Dual-Port Static RAM

CYPRESS [C...

CY7C019
CY7C024

英文版

4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...

CYPRESS

CY7C024
CY7C024

英文版

4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...

CYPRESS [C...

CY7C024
CY7C025

英文版

4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int...

Cypress

CY7C025
CY7C026

英文版

16K x 16/18 Dual-Port Static RAM

Cypress

CY7C026
CY7C027

英文版

32K/64K x 16/18 Dual-Port Static RAM

CYPRESS

CY7C027
CY7C027

英文版

32K/64K x 16/18 Dual-Port Static RAM

CYPRESS [C...

CY7C027
CY7C028

英文版

32K/64K x 16/18 Dual-Port Static RAM

CYPRESS

CY7C028
CY7C028

英文版

32K/64K x 16/18 Dual-Port Static RAM

CYPRESS [C...

CY7C028

CY7C138AV-20JC Datasheet

PDF預(yù)覽

CY7C138AV-20JC相關(guān)型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

CY7C138AV-20JC Datasheet

PDF預(yù)覽

CY7C138AV-20JC相關(guān)型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

建議反饋

PDF糾錯X